Moduleghc-9.10.3GHC2021
GHC.CmmToAsm
Note [Native code generator] ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
The native-code generator has machine-independent and machine-dependent modules.
This module (GHC.CmmToAsm) is the top-level machine-independent
module. Before entering machine-dependent land, we do some
machine-independent optimisations (defined below) on the
CmmStmtss. (Which ideally would be folded into CmmOpt ...)
We convert to the machine-specific Instr datatype with
cmmCodeGen, assuming an infinite supply of registers. We then use
a (mostly) machine-independent register allocator to rejoin
reality. Obviously, regAlloc has machine-specific helper
functions (see the used register allocator for details).
Finally, we order the basic blocks of the function so as to minimise the number of jumps between blocks, by utilising fallthrough wherever possible.
The machine-dependent bits are generally contained under GHCCmmToAsmArch/* and generally breaks down as follows:
Regs: Everything about the target platform's machine registers (and immediate operands, and addresses, which tend to intermingle/interact with registers).Instr: Includes the Instr datatype plus a miscellany of other things (e.g.,targetDoubleSize,smStablePtrTable, ...)CodeGen: is whereCmmstuff turns into machine instructions.Ppr: pprInstr turns an Instr into text (well, really a SDoc).
The register allocators lives under GHC.CmmToAsm.Reg.*, there is both a Linear and a Graph based register allocator. Both of which have their own notes describing them. They are mostly platform independent but there are some platform specific files encoding architecture details under RegAllocatorArch.hs
}
- 1 type
- 2 values
- Packageghc-9.10.3
- Exports3
- LanguageGHC2021
- LicenceBSD-3-Clause
- SourceCmmToAsm.hs
Test-only exports: see #12744
2 declarationscmmNativeGen :: (Instruction instr, OutputableP Platform statics, Outputable jumpDest)=> Logger-> NcgImpl statics instr jumpDest-> UniqSupply-> DwarfFiles-> LabelMap DebugBlock-> RawCmmDeclthe cmm to generate code for
-> Intsequence number of this top thing
-> IO (UniqSupply, DwarfFiles, [NatCmmDecl statics instr], [CLabel], Maybe [RegAllocStats statics instr], Maybe [RegAllocStats], LabelMap [UnwindPoint])
Complete native code generation phase for a single top-level chunk of Cmm. Dumping the output of each stage along the way. Global conflict graph and NGC stats
Constructors
NcgImplncgConfig :: !NCGConfigcmmTopCodeGen :: RawCmmDecl -> NatM [NatCmmDecl statics instr]generateJumpTableForInstr :: instr -> Maybe (NatCmmDecl statics instr)getJumpDestBlockId :: jumpDest -> Maybe BlockIdcanShortcut :: instr -> Maybe jumpDestDoes this jump always jump to a single destination and is shortcutable?
We use this to determine shortcutable instructions - See Note [What is shortcutting] Note that if we return a destination here we *most* support the relevant shortcutting in shortcutStatics for jump tables and shortcutJump for the instructions itself.
shortcutStatics :: (BlockId -> Maybe jumpDest) -> statics -> staticsReplace references to blockIds with other destinations - used to update jump tables.
shortcutJump :: (BlockId -> Maybe jumpDest) -> instr -> instrChange the jump destination(s) of an instruction.
pprNatCmmDeclS :: NatCmmDecl statics instr -> SDocModule is only for printing internal labels. See Note [Internal proc labels] in CLabel.
pprNatCmmDeclH :: NatCmmDecl statics instr -> HDocmaxSpillSlots :: IntallocatableRegs :: [RealReg]ncgAllocMoreStack :: Int -> NatCmmDecl statics instr -> UniqSM (NatCmmDecl statics instr, [(BlockId, BlockId)])The list of block ids records the redirected jumps to allow us to update the CFG.
ncgMakeFarBranches :: Platform -> LabelMap RawCmmStatics -> [NatBasicBlock instr] -> UniqSM [NatBasicBlock instr]extractUnwindPoints :: [instr] -> [UnwindPoint]given the instruction sequence of a block, produce a list of the block's UnwindPoints See Note [What is this unwinding business?] in GHC.Cmm.DebugBlock and Note [Unwinding information in the NCG] in this module.
invertCondBranches :: Maybe CFG -> LabelMap RawCmmStatics -> [NatBasicBlock instr] -> [NatBasicBlock instr]Turn the sequence of
jcc l1; jmp l2intojncc l2; <block_l1>when possible.